Design, Construction and Characterisation of Thirty- Two Output Multiple Pattern Moving Display System

Abstract

A thirty-two output multiple pattern moving display system using discrete components was designed, constructed and characterized in this research work. The system comprises system clock, decimal counter, pattern logic gates, scanning clock, blink clock, pattern/output register, moving display load drivers and moving display load. The system clock is an astable multivibrator synthesized with 555 timer operating at a period of 12.5 seconds. The decimal counter (4017 counter I.C.) counts from state 0 to 9; ten distinct states. Now as it counts, the pattern logic gates designed with two 4000 logic chips (known as quad – 3 – input NOR gate with inverter) does some reasoning and decides which pattern to be displayed. The moving display-scanning clock, which is also, a free running multivibrator was designed to operate on two frequencies; a spelling frequency of 2Hz and a clearing frequency of 1kHz. The output registers are five 74164 shift registers I.Cs. They are loaded high by the pattern register- another 74164, whenever a pattern is to be displayed and loaded low during clearing mode. During the blink mode, the blink clock, which is another free running multivibrator designed to operate at a period of 2 seconds is activated. The output of blink clock is applied to the reset terminals of the whole system registers and therefore the registers are reset every 2 seconds putting the whole system off and on. All the registers together feed the load drivers; thyristors (BT 151-500R) and the loads are small ac voltage bulbs used to illuminate permanently fixed letters to indicate their presence. There are all together five patterns of display. The system has been successfully tested and it worked.