Please use this identifier to cite or link to this item: http://ir.futminna.edu.ng:8080/jspui/handle/123456789/17824
Title: A Comparative Study on SVC and Capacitor Placement for Power Loss Reduction in the 132 kV Shiroro Power Transmission Network
Authors: Jacob, Tsado
Alimi, A. T.
Sadiq, A. A
Hussaini, Habibu
Keywords: SVC
Capacitor
Power Loss
Transmission Network
Issue Date: 2018
Publisher: Bayero Journal of Engineering and Technology (BJET)
Citation: Tsado J., Alimi A. T., Sadiq A. A., and Habibu, H. (2018). A Comparative Study on SVC and Capacitor Placement for Power Loss Reduction in the 132 kV Shiroro Power Transmission Network. Bayero Journal of Engineering & Technology. Vol. 13, No. 1.Pp. 54 - 65.
Series/Report no.: 13;1
Abstract: Evacuation of bulk electrical power generated at remote locations over high voltage transmission networks is preferred, due to economical and reliable supply. However, the inherent characteristics of the transmission facilities results into unacceptable levels of power quality; often measured in terms of voltage deviation and active power losses. These power quality issues increase with the length of the transmission network. Conventionally, Capacitor banks were placed appropriately to mitigate these problems, while recently, FACTS technology is receiving much attention to improve power quality indexes. This paper compares the Effect of Static VAR Compensator (SVC) and Capacitor placement on power loss reduction of the 132kV Shiroro transmission network. The 132kV Shiroro transmission network was modelled as a 10 buses network. Ant colony optimization (ACO) technique was employed for optimal placement of SVC in the modelled network using Power System Computer Aided Design/Electromagnetic Transient and DC (PSCAD/EMTDC) software. The result obtained shows that the total real power losses of the network were 8.43MW and 3.59MW with capacitor and SVC placement respectively. In addition, voltage profile of the system improved and sums of voltage deviation were 28.86volts and 18.55volts with capacitor and SVC optimal placement respectively. It was further observed that SVC reduced the transient effects experienced on the network especially during single line to ground fault condition.
URI: http://repository.futminna.edu.ng:8080/jspui/handle/123456789/17824
ISSN: 2449 – 0539
Appears in Collections:Electrical/Electronic Engineering

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